This invention relates to a multilayer printed wiring board and a method of producing the same, and proposes a multilayer printed wiring board having an excellent resistance to heat cycle and suitable for high densification of interconnecting and through-holes.
Recently, so-called build-up multilayer wiring board is noticed from a demand for high densification of a multilayer wiring board. This build-up multilayer wiring board is produced by a method as disclosed, for example, in JP-B-4-55555. That is, an insulating material made from a photosensitive adhesive for electroless plating is applied onto a core substrate, dried and developed by light exposure to form an interlaminar insulating layer having openings for via-holes, and then the surface of the interlaminar insulating layer is roughened with an oxidizing agent or the like, and a plating resist is formed on the roughened surface, and portions not forming the resist are subjected to an electroless plating to form via-holes and conductor circuit patterns, and these steps are repeated plural times to obtain a multilayered build-up wiring board.
In such a multilayer printed wiring board, through-holes are formed in the core substrate to connect upper and lower conductor layers to each other, whereby further multilayer formation can be attempted.
In this type of the multilayer printed wiring board having the through-holes in the core substrate, as shown in FIG. 1, a conductor circuit pattern including through-holes is first formed on a core substrate, and then a roughened layer is formed on a surface of the conductor including an inner wall surface of each through-hole by oxidation-reduction treatment, and thereafter a resin filler is filled in each through-hole and between the conductor circuit patterns, and then the surface of the substrate is flattened by polishing and subjected to a rough plating such as interplate (alloy plating composed of copper-nickel-phosphorus, sold by Ebara Yujirite Co., Ltd.) to form an interlaminar resin insulating layer thereon.
In the multilayer printed wiring board produced by this method, however, the roughened layer on the upper surface of the conductor layer is an alloy-plated layer through the interplate plating, while the roughened layer on the side surface of the conductor circuit pattern is a graphitization-reduction treated layer, thus, the interlaminar resin insulating layer joined to the conductor through such a roughened layer has a problem that cracks are created by heat cycle test or the like because of the difference in formation of the roughened layers.
And also, in the multilayer printed wiring board having the through-holes formed in the core substrate, the through-hole itself is a dead space, so that the high densification of the interconnecting is considerably obstructed. Further, the connection of the through-hole to the via-hole is carried out by providing a pad for the connection of the via-hole onto a land portion of the through-hole, so that the pitch of the through-hole can not be made small due to the presence of the pad and hence there is a problem that the high densification of the through-hole is considerably obstructed.
In order to increase the forming density of the interconnection and through-hole, the applicant has previously proposed a multilayer printed wiring board having such a structure that conductor circuit patterns are formed on a substrate through an interlaminar resin insulating layer and through-holes are formed in the substrate and a filler is filled in each through-hole, wherein a conductor layer covering a surface of the filler exposed from the through-hole is formed just above the through-hole and via-holes are formed so as to be connected to the conductor layer.
In such a proposed multilayer printed wiring board, as shown in FIG. 2, through-holes are first formed in a core substrate and roughened by oxidation-reduction treatment, and thereafter a filler is filled in each through-hole and flattened, and subjected to a plating (cover plating) and etched to form a conductor layer covering a surface of the filler exposed from the through-hole (hereinafter referred to as a xe2x80x9ccover plated layerxe2x80x9d simply) and a conductor circuit pattern, and further roughened layers are formed on these conductor surfaces by oxidation-reduction treatment or the like and a filler is filled in a recess portion between the conductors and the protruded surface of the filler is flattened by polishing and then subjected to a rough plating such as interplate (alloy plating composed of copper-nickel-phosphorus, sold by Ebara Yujirite Co., Ltd.) to form an interlaminar resin insulating layer thereon.
Even in the multilayer printed wiring board produced by this method, however, the roughened layer on the surface of the conductor circuit pattern is an alloy plated roughened layer through the interplate and the roughened layer facing to the side of the conductor circuit pattern is a graphitization reduction treated layer, so that the interlaminar resin insulating layer connected to the conductors through these roughened layers has a problem of creating cracks by heat cycle test or the like, due to the difference in formation of these roughened layers.
In this method, there is a problem that the cover plated layer is damaged by the polishing treatment for the flattening carried out after the filling of the filler.
The invention is to solve the aforementioned problems of the conventional techniques and to provide a multilayer printed wiring board having an excellent crack resistance under conditions of heat cycle and the like and a method of producing the same.
Another object of the invention is to propose a method of producing the multilayer printed wiring board capable of realizing high densification of interconnection and through-hole without damaging the cover plated layer.
The inventors have made various studies in order to achieve the above objects and as a result the invention comprising the following constituents has been accomplished.
(1) That is, the invention lies in a multilayer printed wiring board having a structure that outer conductor circuit patterns are formed on a core substrate having inner conductor circuit patterns formed thereon through inter-laminar resin insulating layers, and through-holes for electrically connecting the inner conductor patterns to each other are formed in the core substrate, and a filler is filled in the through-hole, characterized in that the interlaminar resin insulating layer is flat and the same kind of roughened layer is formed on the conductor circuit pattern over a full surface including side surfaces thereof.
(2) And also, the invention lies in a multilayer printed wiring board having a structure that outer conductor circuit patterns are formed on a core substrate having inner conductor circuit patterns formed thereon through inter-laminar resin insulating layers, and through-holes for electrically connecting the inner conductor patterns to each other are formed in the core substrate, and a filler is filled in the through-hole, characterized in that a conductor layer covering an exposed surface of each filler from the through-hole is formed just above the through-hole, and the same kind of roughened layer is formed on the conductor layer and the inner conductor circuit pattern located at the same level as the conductor layer over a full surface including side surfaces thereof, and the interlaminar resin insulating layer is formed so as to cover the surfaces of these roughened layers and filled in recess portions between the conductor and inner conductor circuit pattern or between the inner conductor circuit patterns and flattened on its surface.
(3) Further, the invention lies in a method of producing a multilayer printed wiring board having a structure that outer conductor circuit patterns are formed on a core substrate having inner conductor circuit patterns formed thereon through interlaminar resin insulating layers, and through-holes for electrically connecting the inner conductor patterns to each other are formed in the core substrate, and a filler is filled in the through-hole, which comprises at least the following steps (a)xcx9c(g):
(a) a step of forming through-holes on a substrate provided on each of both surfaces with a metal layer;
(b) a step of roughening the surface of each metal layer and the inner wall face of each through-hole;
(c) a step of filling a resin in each through-hole;
(d) a step of flattening the rein exposed from the through-hole and the roughened surface of the metal layer by polishing;
(e) a step of etching the metal layer to form inner conductor circuit patterns to thereby form the core substrate;
(f) a step of forming the same kind of roughened layers on a full surface of the inner conductor circuit pattern including side faces thereof; and
(g) a step of forming the resin insulating layer so as to cover the roughened layers and flattening the surface of the resin insulating layer by hot pressing to form an interlaminar resin insulating layer.
(4) Moreover, the invention lies in a method of producing a multilayer printed wiring board having a structure that that outer conductor circuit patterns are formed on a core substrate having inner conductor circuit patterns formed thereon through interlaminar resin insulating layers, and through-holes for electrically connecting the inner conductor patterns to each other are formed in the core substrate, and a filler is filled in the through-hole, which comprises at least the following steps (a)xcx9c(g):
(a) a step of forming through-holes in the core substrate;
(b) a step of forming a roughened layer on an inner wall face of each through-hole;
(c) a step of filling a filler in the through-hole;
(d) a step of forming a conductor layer covering an exposed of the filler from the through-hole just above the through-hole;
(e) a step of forming the same kind of roughened layers on a full surface of the conductor layer and the inner conductor circuit pattern located at the same level as the conductor layer including side surfaces thereof;
(f) a step of forming a resin insulating layer so as to cover the roughened layers and flattening the surface of the resin insulating layer by hot pressing to form an interlaminar resin insulating layer; and
(g) a step of forming outer conductor circuit patterns on the inter-laminar resin insulating layer.
In the production method described in the above item (4), the formation of the roughened layer at the step (b) is favorable to be carried out by oxidation-reduction treatment.
And also, the formation of the roughened layer at the step (e) is favorable to be conducted by the same kind of roughening treatment.
When a photosensitive interlaminar resin insulating layer is formed at the step (f), it is preferable that a transparent film is adhered to the surface of the resin insulating layer prior to the hot pressing and then the surface of the resin insulating layer is flattened through the transparent film by hot pressing and cured by light exposure and thereafter the transparent film is removed to conduct a development treatment.
And also, the hot pressing at the step (f) is favorable to be carried out by pushing a metal plate or a metal roll while heating the resin insulating layer.
Furthermore, in the step (f), the hot pressing of the resin insulating layer composed mainly of epoxy resin is favorable to be carried out under conditions that a temperature is 40xcx9c60xc2x0 C., a pressure is 3.5xcx9c6.5 kgf/cm2 and a pressing time is 30xcx9c90 seconds.
It is preferable that an opening is formed in a portion of the interlaminar resin insulating layer located just above the through-hole to form outer conductor circuit pattern and via-hole.
Further, it is preferable to use a filler comprising metal particles, a thermosetting or thermoplastic resin and a curing agent as the filler.